Alternatives to Impact Monitoring and Assessment Framework for the Chips JU

Expected Outcome: the proposals under this call are expected to address one or more of the following subjects : • Enhanced personalized monitoring, care and treatments, focusing on the development of highly customized healthcare solutions, including the required research and diagnostic tools, tailored to individual needs, covering various scenarios such as chronic disease management, physiotherapy, precision diagnosis, personalized medicine/treatment, pre- and postoperative care, and daily assistance in homes and common spaces. It also targets effective management of chronic diseases and elderly care through personalized monitoring and interventions facilitated by advanced sensor technologies and edge-to-cloud solutions. This includes the development and integration of solutions for Hospitalization at Home, enabling patients to receive complex, remotely supervised care using intelligent medical devices capable of sensing, analysing, and transmitting real-time data. This requires a continuum, from in-hospital diagnostics to robust, long-term patient support at home via AI-driven care pathways and hospitalization at home. • Prevention and treatment of diseases, allowing the improved…

Expected Outcome: The proposals under this topic should address the design/specification and implementation/testing of the key microelectronics building blocks of an FR3 FEM paving the way towards their future integration into a complete integrated FEM system. • Progresses the State of the art to optimise the cost-performance trade off to serve the target ITU IMT 2030 specifications, notably for what concerns maximum data rate, user data rate, spectral efficiency, whilst enabling 50% mobile transmission system energy consumption; • Allows operational implementation of spectrum sharing with other spectrum users within the selected FR3 sub-band; • Enables large arrays integration for increased path loss compensation at FR3 frequencies with very compact, low power, high efficiency FEM integration; • Enables high bandwidth for carrier aggregation with broadband RF transceivers; • Enables SBFD (Sub-Band non overlapping Full-Duplex) for UL coverage extension (Rel.-19 5G-Advanced in 3GPP) with appropriate interference cancellation techniques; • Enables ISAC (Integrated Sensing and Communications) supporting monostatic as well as bistatic radar functionality, and addressing interference…

Scope: Proposals innovations should address one or more of the several domains : WBG substrates to reduce EU dependency on material and provide more sustainable, industrially compatible solutions. WBG platform for cost effectiveness, available in 300mm for GaN and/or SiC to improve yield and power density and close gaps in the value chain. A toolbox (e.g. wafer cut, smart stacking, thin layer transfer, epitaxy, UWBG materials) for further innovation schemes. Next generation or optimised new power semiconductor devices fitting their application. Adding intelligence to power semiconductor devices on control and/or sensor side. Facilitate the propagation of EU Packaging/Integration excellence along the entire value chain e.g. pre-packages or power semiconductor device packaging solutions to enable power device/system integration and strengthen Europe’s competitiveness in advanced packaging. Explore the use of heterogeneous and functional integration for improved performance, reliability, robustness and cost competitiveness. Rising operative voltage, frequency, current and thermal features that are common challenge on power electronics across the different application sectors. Provide…

Expected Impact: Projects funded under this call are expected to deliver tangible industrial outputs that demonstrably advance the readiness and affordability of future governmental Ka-band user terminals for IRIS2 and GOVSATCOM services. Expected outputs include, for example: qualified production processes, calibrated sub-assemblies, pilot-run units, validated manufacturing equipment chains or manufacturing cost models. Purely analytical deliverables (studies, design reports) are not sufficient as primary outputs but may complement the above. Where relevant, outputs shall include documented design assumptions, interface parameters or process specifications enabling adaptation to different terminal configurations with limited re-engineering, so as to support uptake in follow-on integration, pilot deployment and scale-up activities. Objective: The aim of this call for proposals is to advance the industrial readiness of European Ka-band user terminal technologies, subsystems and manufacturing processes, with a view to enabling cost-effective production of user terminals for services provided under the Union secure connectivity programme (IRIS²) and GOVSATCOM. The target reference…

Expected Outcome: Proposals submitted to this call are expected to address several of the following elements: • Scaling of wafer-level photonic processes for key materials (e.g. SiN, InP, GaAs),including process integration, yield optimisation, and manufacturability at highvolumes. • Development of packaging and test solutions that are scalable, automated, andcompatible with co-packaged optics and advanced photonic-electronic integration. • Integration of heterogeneous materials and components, such as on-chip lasers,modulators, and detectors, using advanced packaging and assembly approaches. • Design-process-equipment co-optimisation, enabling repeatable, cost-effectiveproduction of complex photonic circuits and systems, including use of PDKs andvalidated building blocks. • Demonstration of system-level functionality through application-relevant use casesin strategic sectors (e.g. AI, sensing, telecommunication, mobility, health, defence),with quantified performance metrics and clear market relevance.

Expected Outcome: The targeted outcomes reflect the above challenges and cover a comprehensive Front End module design which: Covers the FR3 range as defined by the relevant Agenda Item of WRC 27 (7 to 15 GHz range) with possible extension up to 24 GHz if required by some regional implementations, with inherent tuning capabilities to accommodate potential regional variations. Mitigates interferences with incumbent FR3 band users and maximises sharing capabilities across the band in line with the European regulatory approach on spectrum sharing. Enables integration of a large number of antenna elements beyond the State of the Art and support massive MIMO implementation with compensation of increased path loss compared to 5G FR1 implementations. Enables at least an order-of-magnitude increase in RF processing compared to 5G FR1 implementations. Enables 5G cell site reuse and minimises deployment complexity on top of 5G sites deployment. Enables low-cost and low energy implementation of the elementary constituent modules, efficient packaging and is mainly based on the integration of microelectronics heterogeneous technologies where European industry has strong expertise and…

Expected Outcome: Expected outcomes: A sustained pipeline of highly qualified semiconductor graduates, with shorter time-to-readiness for industry roles; greater inflow of diverse talent including women and underrepresented groups; improved intra- and extra-EU student mobility; and strong complementarity with existing Chips Act infrastructure such as pilot lines, design platforms, and Competence Centres. Scope: This call funds the creation of specialised academic "Hubs of Excellence" in critical semiconductor technology areas (e.g. chip design, manufacturing, photonics, power electronics). Projects should build industry-aligned Bachelor, Master, and PhD programmes.

Expected Outcome: The expected outcomes of this topic are : A common EU evaluation platform for AI chips and racks, with transparent KPIs, workloads and benchmark reports used for Chips JU selection and procurement decisions. First pilot deployments of European AI compute systems validated for EU sovereign partitions of AI infrastructure. Structured collaboration between buyers and suppliers, supporting deployment, integration and optimisation of European AI compute solutions. Stronger EU demand for European AI chips and racks, helping to create a market for deployment-ready solutions. Increased EU technological sovereignty across the AI compute stack for European datacentres.

Expected Outcome: Objectives and profile of the ERC Plus Grant Principal Investigator The ERC Plus Grant supports outstanding Principal Investigators who address a major scientific challenge. Applications for ERC Plus Grants should be for projects that could not be carried out with a regular ERC grant. Applicants should explain how the proposed project aims go beyond those of a regular ERC project, for example, because they have a vision to transform their field or open a new field of research. Scholars at all career stages can apply for an ERC Plus Grant if they have an outstanding record of scientific achievement at the forefront of their field. Their intellectual leadership will be evaluated in comparison to peers at their own career stage. It is expected that a researcher may be the Principal Investigator of only one ERC Plus Grant in their lifetime. Applicants should be aware that every year, only some 30 ERC Plus Grants can be awarded across all fields and all career stages, compared to approximately 1000 Starting, Consolidator and Advanced Grants. This level of competitiveness should be taken into account when considering whether to submit an application. Size of ERC Plus…

Spain – Computer-related management services – Servicios de Atención a Personas Usuarias convergentes 2027

Expected Outcome: Practical chip design experience integrated into education at multiple levels; at least 1,000 students across Europe completing funded tape-outs over 4 years; stronger reskilling pathways for students from adjacent fields; and a sustainable, continent-wide pipeline of chip design talent to support Europe's semiconductor ambitions. Scope: This call funds a comprehensive Chip Design Skills Programme to lower barriers to entry in chip design and tape-outs. At least 60% of the budget must support hands-on tape-out experiences (via multi-project wafers) for university and secondary school students.

Expected Outcome: Europe's first long-term VET provider network for semiconductors; a larger and more diverse pool of qualified technicians; and increased intra- and extra-EU mobility of students and workers to fill skills gaps in semiconductor facilities. Scope: This call supports the establishment of a European-level federation of Vocational Education and Training (VET) providers focused on semiconductor industry roles. Projects should develop industry-aligned micro-credentials and reskilling programmes, with a strong emphasis on workers transitioning from other industrial sectors and on cross-border recognition of qualifications.